Victor Domingues do Amaral
AI Engineer & PhD Researcher
Sophia Antipolis, France
About
I’m an AI research engineer at STMicroelectronics and a PhD candidate at Université Paris-Saclay, in partnership with the GeePs laboratory (CentraleSupélec). My research is on on-device learning for memory-constrained devices such as microcontrollers — training and adapting neural networks locally, without cloud dependency.
Making that possible means fitting models to hardware that was never designed to train them. I work across the techniques that shrink a network’s memory and compute footprint: quantization, pruning, knowledge distillation and backpropagation-free optimization.
Experience
Research Engineer · STMicroelectronics Feb 2025 – PresentSophia Antipolis, France- Enabling computer-vision models to train and adapt directly on microcontrollers and integer-only NPUs (STM32N6 / Neural-ART), rather than in the cloud.
- Designed an adaptive gradient-sampling method (QScheduler) and a scheme to recalibrate INT8 quantization scales during training.
- Industrial PhD research in partnership with the GeePs laboratory (CentraleSupélec).
- Intern · STMicroelectronics May 2023 – Jan 2024Sophia Antipolis, France
- Optimized deep-learning computer-vision models for deployment on resource-constrained embedded devices.
- Contributed memory optimizations to the STM32 AI Model Zoo , STMicroelectronics’ open-source collection of edge-AI models for STM32 microcontrollers.
Intern · Université Paris-Saclay Jun 2022 – Sep 2022Gif-sur-Yvette, France- Research internship at the MICS laboratory on accelerating computationally heavy Finite Element Method (FEM) simulations by distributing them across parallel compute nodes.
- Tackled the core challenge of parallel FEM — partitioning the simulation mesh to balance the workload evenly across nodes while minimizing the communication at partition boundaries.
- Benchmarked and analyzed mesh-partitioning algorithms (spectral, geometric, and graph-based) against these load-balance and inter-node communication metrics.
Intern · Universidade de São Paulo May 2019 – Dec 2020São Carlos, SP, Brazil- Built and maintained a request-management and automation system (OTRS) serving students, professors, and researchers.
- Developed automation scripts integrating the Google API to streamline recurring administrative workflows.
Education
- Ph.D. Candidate — On-Device Learning for Edge AI · Université Paris-Saclay Feb 2025 – PresentParis, FranceIndustrial PhD (CIFRE), in partnership with STMicroelectronics and the GeePs laboratory (CentraleSupélec). Paris-Saclay is France's leading university and ranked #13 worldwide (ARWU 2025).
Diplôme d'Ingénieur / M.Sc., Computer Science · CentraleSupélec Sep 2021 – Oct 2024Paris, FranceOne of France's leading engineering grandes écoles and a founding member of Université Paris-Saclay. Among the most selective engineering schools in the country.- B.E., Computer Engineering · Universidade de São Paulo (USP) 2018 – 2024BrazilBrazil's largest and most prestigious university and a leading research university in Latin America.
Publications & Communications
QScheduler: Adaptive Gradient Sampling for Zeroth-Order On-Device Training on INT8 NPUs
A Framework for On-Device Training on the STM32N6
Patents
- Analyzing and Adjusting an Artificial Neural Network
- On-Device Zeroth-Order Training Method
Awards & Honors
- Academic Merit Scholarship · AUCANI — University of São Paulo 2021Merit-based scholarship, awarded on academic ranking within the class, supporting a place in a highly competitive double-degree engineering program in France.
- Gold Medal · Brazilian Physics Olympiad 2016Gold medal at the São Paulo state stage & Silver medal at the national final.
Skills
Programming
Machine Learning
High-Performance Computing
Systems & Tools
Languages
- PortugueseNative / Bilingual
- FrenchFull professional
- EnglishFull professional
Certifications
- English — C1 (Linguaskill 180+) Cambridge
- London 2026 Speaker Badge EdgeAI Foundation
- London 2026 Contributor Badge EdgeAI Foundation